2008 |
Computational Density of Fixed and Reconfigurable Multi-Core Devices for Application Acceleratio |
J. Williams, A. George, J. Richardson, K. Gosrani, and S. Suresh |
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2008 |
FPGA Design Framework for Partial Run-Time Reconfiguration |
C. Conger, A. Gordon-Ross, and A. George |
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2008 |
An XML Approach to Facilitating IP Core Reuse |
N. Rollins, M. Wirthlin, and A. Arnesen |
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2008 |
An XML Schema for Representing Reusable IP Cores for Reconfigurable Computing |
N. Rollins, A. Arnesen, M. Wirthlin |
PDF |
2008 |
Using Duplication with Compare for On-line Error Detection in FPGA-based Designs |
J. Johnson, W. Howes, M. Wirthlin, D. L. McMurtrey, M. Caffrey, P. Graham, K. Morgan |
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2008 |
Fixed and Reconfigurable Multi-Core Device Characterization for HPEC |
J. Williams, A. George, J. Richardson, K. Gosrani, and S. Suresh |
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2007 |
Lessons Learned with Performance Prediction and Design Patterns on Molecular Dynamics |
B. Holland, K. Nagarajan, S. Merchant, H. Lam, and A. George |
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2007 |
Challenges for Performance Analysis in High-Performance Reconfigurable Computing |
S. Koehler, J. Curreri, and A. George |
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2007 |
Bringing High-Performance Reconfigurable Computing to Exact Computations |
E. El-Araby, I. Gonzalez, and T. El-Ghazawi |
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2007 |
Automatic Software Hardware Co-Design for Reconfigurable Computing Systems |
P. Saha |
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2007 |
Simulation Framework for Performance Prediction in the Engineering of RC Systems and Applications |
E. Grobelny, C. Reardon, A. Jacobs, and A. George |
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2007 |
RAT: A Methodology for Predicting Performance in Application Design Migration to FPGAs |
B. Holland, K. Nagarajan, C. Conger, A. Jacobs, and A. George |
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2007 |
Evaluating Partial Reconfiguration for Embedded FPGA Applications |
R. Hymel, A. George, and H. Lam |
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2007 |
A Portable Memory Access Framework on Reconfigurable Computers |
M. Huang, I. Gonzalez, and T. El-Ghazawi |
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A Scalable, Ultra-Low-Latency FPGA Accelerator for Neuromorphic Feature Extraction |
L. Kljucaric, M. Ing, A. George |
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Flow-Based Event Stream Compression for Low-Power Communication |
D. Stumpp, H. Akolkar, A. George, R. Benosman |
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Dependable Edge Tensor Processing Units for Space: Characterizing and Mitigating Model-Caching Soft-Error Vulnerabilites |
T. Garrett, S. Roffe, and A. George |
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Evaluation of AMD-Xilinx Versal Architecture for Next-Gen Edge Space Computing |
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