| 2019 |
On the Portability of GPU-Accelerated Applications via Automated Source-to-Source Translation |
P. Sathre, M. Gardner, W. Feng |
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| 2018 |
Machine-Learning Space Applications on SmallSat Platforms with TensorFlow |
J. Manning, D. Langerman, B. Ramesh, E. Gretok, C. Wilson, A. George, J. MacKinnon, G. Crum |
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| 2018 |
Deep Learning for Hyperspectral Image Classification on Embedded Platforms |
S. Balakrishnan, D. Langerman, E. Gretok, A. George |
PDF |
| 2018 |
Towards Resilient Spaceflight Systems with Virtualization |
D. Sabogal, A. George |
PDF |
| 2018 |
Accelerating Real-Time, High-Resolution Depth Upsampling on FPGAs |
D. Langerman, S. Sabogal, B. Ramesh, A. George |
PDF |
| 2018 |
Spacecraft Mission Agent for Autonomous Robust Task Execution |
A. Gillette, B. O’Connor, C. Wilson, A. George |
PDF |
| 2018 |
Counter Advance for Reliable Encryption in Phase Change Memory |
D. Kline Jr., R. Melhem, A. Jones |
PDF |
| 2018 |
Racetrack Queues fo Extrememly Low-Energy FIFOs |
D. Kline Jr., H. Xu, R. Melhem, A. Jones |
PDF |
| 2018 |
Neutron Radiation Beam Results for the Xilinx UltraScale+ MPSoC |
J. Anderson, J. Leavitt, M. Wirthlin |
PDF |
| 2018 |
A Real-Time, Power-Efficient Architecture for Mean-Shift Image Segmentation |
S. Craciun, R. Kirchgessner, A. George, H. Lam, J. Principe |
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| 2018 |
High-frequency absorption-fifo pipelining for stratix 10 hyperflex |
M. N. Emas, A. Baylis, and G. Stitt |
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| 2018 |
Improving the Effectiveness of TMR Designs on FPGAs with SEU-Aware Incremental Placement |
M. Cannon, A. Keller, M. Wirthlin |
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| 2018 |
Demand Driven Assembly of FPGA Configurations Using Partial Reconfiguration, Ubuntu Linux, and PYNQ |
J. Goeders, T. Gaskin, B. Hutchings |
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| 2018 |
Using Physical and Functional Comparisons to Assure 3rd-Party IP for Modern FPGAs |
A. Hastings, S. Jensen, J. Goeders, B. Hutchings |
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| 2018 |
Onboard Processing with Hybrid and Reconfigurable Computing on Small Satellites |
Alan D. George, and Christopher M. Wilson |
PDF |
| 2018 |
Research Opportunities in Heterogeneous Computing for Machine Learning |
H. Lam, D. Ojika |
PDF |
| 2018 |
CSP Hybrid Space Computing - Presentation |
C. Wilson, A. George |
PDF |
| 2018 |
Scalable window generation for the intel broadwell+arria 10 and high-bandwidth fpga systems |
G. Stitt, A. Gupta, M. N. Emas, D. Wilson, and A. Baylis |
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| 2018 |
Dynamic SEU Sensitivity of Designs on Two 28-nm SRAM-Based FPGA Architectures |
A. Keller, T. Whiting, K. Sawyer, M. Wirthlin |
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| 2018 |
A Framework for Auto-Parallelization and Code Generation: An Integrative Case Study with Legacy FORTRAN Codes |
K. Krommydas, R. Sasanka, P. Sathre, W. Feng |
PDF |
| 2018 |
Cache Fault Injection with DrSEUs |
E. Carlisle, A. George |
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| 2018 |
A Composable Workflow for Productive Heterogeneous Computing on FPGAs via Whole-Program Analysis and Transformation |
P. Sathre, A. Helal, W. Feng |
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| 2018 |
Radiation-Tolerant, GaN-based Point of Load Converters for Small Spacecraft Missions |
T. Cook, N. Franconi, B. Shea, C. Wilson, B. Grainger, A. George, A. Barchowsky |
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| 2017 |
Investigating TI KeyStone II and quad-core ARM Cortex-A53 Architectures for On-board Space Processing |
B. Schwaller, B. Ramesh, A. George |
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| 2017 |
SSIVP: Spacecraft Supercomputing Experiment for STP-H6 |
• S. Sabogal, P. Gauvin, B. Shea, D. Sabogal, A. Gillette, C. Wilson, A. George, G. Crum, A. Barchowsky, T. Flatley |
PDF |
| 2017 |
Using On-Chip Error Detection to Estimate FPGA Design Sensitivity |
A. Keller |
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| 2017 |
OPIR Video Preprocessing and Compression for On-Board Aerospace Computing |
E. Shea, A. George |
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| 2017 |
Efficient and Autonomous Processing and Classification of Images on Small Spacecraft |
A. Gillette, C. Wilson, A. George |
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| 2017 |
Hybrid, Adaptive, and Reconfigurable Fault Tolerance (HARFT) |
C. Wilson, S. Sabogal, A. George, A. Gordon-Ross |
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| 2017 |
Comparative Analysis of Parallel OPIR Compression on Space Processors |
A. Ho, E. Shea, A. George, A. Gordon-Ross |
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| 2017 |
OpenCL-based design pattern for line rate packet processing |
J. Khan, P. Athanas, S. Booth, J. Marchall |
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| 2017 |
A Test Bed Study of Network Determinism for Heterogeneous Traffic Using Time-Triggered Etherne |
A. Starke, M. Ford, D. Kumar, J. McNair, A. Bell |
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| 2017 |
A High-Level Synthesis Scheduling and Binding Heuristic for FPGA Fault Tolerance |
D. Wilson, A. Shastri, and G. Stitt. |
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| 2017 |
Exploration of TMR Fault Masking with Persistent Threads on Tegra GPU SoCs |
A. Milluzzi, A. George, |
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| 2017 |
Optimizing FPGA Performance, Power, and Dependability with Linear Programming |
N. Wulf, A. George, A. Gordon-Ross |
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| 2017 |
AutoMatch: An Automated Framework for Relative Performance Estimation and Workload Distribution on Heterogeneous HPC Systems |
A. Helal, W. Feng, C. Jung, Y. Hanafy |
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| 2017 |
Vivado Design Interface: An Export/Import Capability for Vivado FPGA Designs |
T. Townsend, B. Nelson |
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| 2017 |
Comparative Analysis of Present and Future Space-Grade Processors with Device Metrics |
T. Lovelly, A. George |
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| 2017 |
Overlay-based side-channel countermeasures: A case study on correlated noise generation |
A. Baylis, G. Stitt, and A. Gordon-Ross |
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| 2017 |
Software and Firmware Co-development using High-Level Synthesis |
N. Ghanathe, A. Madorsky, H. Lam, D. Acosta, A. George, M. Carver, Y. Xia, Jyothishwara, A., Hansen, M. |
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| 2017 |
A scalable, low-overhead finite-state machine overlay for rapid FPGA application development |
D. Wilson and G. Stitt, |
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| 2017 |
Robotomata: A Framework for Approximate Pattern Matching of Big Data on an Automata Processor |
X. Yu, K. Hou, H. Wang, W. Feng |
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| 2016 |
Benefits of Complementary SEU Mitigation for the LEON3 Soft Processor on SRAM-Based FPGAs |
A. Keller, M. Wirthlin |
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| 2016 |
Configuration Prefetching and Reuse for Preemptive Hardware Multitasking on Partially Reconfigurable FPGAs |
A. Morales-Villanueva, R. Kumar, and A. Gordon-Ross |
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| 2016 |
SEU Mitigation and Validation of the LEON3 Soft Processor Using Triple Modular Redundancy for Space Processing |
M. Wirthlin, A. Keller, C. McCloskey, P. Ridd, D. Lee, J. Draper |
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| 2016 |
HISC/R: An Efficient Hypersparse Storage Format for Scalable Graph Processing |
R. Kirchgessner, G. De La Torre, A. George, V. Gleyzer |
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| 2016 |
An OpenCL Framework for Distributed Apps on a Multidimensional Network of FPGAs |
Lawande, A. George, H. Lam |
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| 2016 |
Edit Real-Time, Low-Latency Image Processing with High Throughput on a Multi-Core SoC |
Ramesh, A. George, H. Lam |
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| 2016 |
Computational and Memory Analysis of Tegra SoCs |
Milluzzi, A. George, H. Lam |
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| 2016 |
A q-gram Birthmarking Approach to Predicting Reusable Hardware |
K. Zeng, P. Athanas |
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