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Publications

Year Title Authors View
2016 Computational and Memory Analysis of Tegra SoCs Milluzzi, A. George, H. Lam PDF
2016 A q-gram Birthmarking Approach to Predicting Reusable Hardware K. Zeng, P. Athanas PDF
2016 Benefits of Complementary SEU Mitigation for the LEON3 Soft Processor on SRAM-Based FPGAs A. Keller, M. Wirthlin PDF
2016 Novo-G#: A Community Resource for Exploring Large-Scale Reconfigurable Computing with Direct and Programmable Interconnects George, M. Herbordt, H. Lam, A. Lawande, J. Sheng PDF
2016 SEU Mitigation and Validation of the LEON3 Soft Processor Using Triple Modular Redundancy for Space Processing M. Wirthlin, A. Keller, C. McCloskey, P. Ridd, D. Lee, J. Draper PDF
2016 FPGA-Pipelined Discrete-Event Simulations for Accelerated Behavioral Emulation of Extreme-Scale Systems Pascoe, N. Kumar, K. Alli, H. Lam, G. Stitt, A. George PDF
2016 μCSP: A Diminutive, Hybrid, Space Processor for Smart Modules and CubeSats Wilson, J. MacKinnon, P. Gauvin, S. Sabogal, A. George PDF
2016 Behavioral Emulation for Scalable Design-Space Exploration of Algorithms and Architectures N. Kumar, C. Pascoe, C. Hajas, H. Lam, G. Stitt, A. George PDF
2016 Novo-G#: a Multidimensional Torus-based Reconfigurable Cluster for Molecular Dynamics, A. Lawande, A. George, H. Lam PDF
2016 A Methodology for Estimating Reliability of SmallSat Computers in Radiation Environments Wilson, A. George, B. Klamm PDF
2016 DrSEUs: A Dynamic Robust Single-Event Upset Simulator Carlisle, N. Wulf, J. MacKinnon, A. George PDF
2016 Improving Compression Ratios for High Bit-Depth Grayscale Video Formats Ho, A. George, A. Gordon Ross PDF
2015 Core-level modeling and frequency prediction for DSP applications on FPGAs G. Wang, G. Stitt, H. Lam, A. George PDF
2015 On the Performance, Energy, and Power of Data-Access Methods in Heterogeneous Computing Systems R. Kalidas, M. Daga, K. Krommydas, W. Feng PDF
2015 Partial Region and Bitstream Cost Models for Hardware Multitasking on Partially Reconfigurable FPGAs A. Morales-Villanueva, A. Gordon-Ross PDF
2015 A scheduling and binding heuristic for high-level synthesis of fault-tolerant FPGA applications A. Shastri, G. Stitt, and E. Riccio PDF
2015 An Automated High-level Design Framework for Partially Reconfigurable FPGAs R. Kumar and A. Gordon-Ross PDF
2015 MACS: A Highly Customizable Low-latency Communication Architecture R. Kumar and A. Gordon-Ross PDF
2015 Comparative Analysis of OpenCL vs. HDL with Image-Processing Kernels on Stratix-V FPGA K. Hill, S. Craciun, A. George, H. Lam
2015 CSP Hybrid Space Computing for STP-H5/ISEM on ISS C. Wilson, A. George, et al. PDF
2015 Memory-Aware Optimization of FPGA-based Space Systems N. Wulf, A. George, A. Gordon-Ross PDF
2015 Performance and Productivity Evaluation of Hybrid-Threading HLS versus HDLs G. Wang, H. Lam, A. George, G. Edwards PDF
2015 In-System Testing of Xilinx 7-Series FPGAs: Part 1-Logic H. Modi, P. Athanas PDF
2015 Low-level PGAS computing on many-core processors with TSHMEM B. Lam, A. George, H. Lam, V. Aggarwal PDF
2015 Discovering Reusable Hardware Using Birthmarking Techniques K. Zang, P. Athanas PDF
2015 Low-Overhead FPGA Middleware for Application Portability and Productivity R. Kirchgessner, A. George, G. Stitt PDF
2015 CMT-bone: A Mini-App for Compressible Multiphase Turbulence Simulation Software Kumar, Nalini, Mrugesh Sringarpure, Tania Banerjee, Jason Hackl, S. Balachandar, Herman Lam, Alan George, and Sanjay Ranka PDF
2014 Comparative Analysis of Present and Future Space Processors with Device Metrics T. M. Lovelly, K. Cheng, W. Garcia, and A. D. George PDF
2014 CSP: A Multifaceted Hybrid System for Space Computing P. Gauvin, J Urriste, D. Rudolph, J. Stewart, C. Wilson, C. Morales, A. George, H. Lam, A. Stoddard, A. Wilson, M. Wirthlin, G. Crum PDF
2014 CSP: A Multifaceted Hybrid Architecture for Space Computing D. Rudolph, C. Wilson, J. Stewart, P. Gauvin, A. D. George, H. Lam, G. Crum, M. Wirthlin, A. Wilson, and A. Stoddard PDF
2014 Simulative analysis of a multidimensional torus-based reconfigurable cluster for molecular dynamics A. Lawande, H. Yang, A. George, and H. Lam PDF
2014 CERE: a CachE Recommendation Engine: Efficient Evolutionary Cache Hierarchy Design Space Exploration G. Yessin, A. A. Badawy, V. Narayana, D. Mayhew, and T. El-Ghazawi PDF
2014 Symbiotic Scheduling of Concurrent GPU Kernels for Performance and Energy Optimizations T. Li, V. K. Narayana and T. El-Ghazawi PDF
2014 New approaches for in-system debug of behaviorally-synthesized FPGA circuits Josh Monson and Brad Hutchings PDF
2014 A Method and Case Study on Identifying Physically Adjacent Multiple-Cell Upsets Using 28-nm, Interleaved and SECDED-Protected Arrays M. Wirthlin, D. Lee, G. Swift, and H. Quinn PDF
2014 Single-Event Characterization of the 28 nm Xilinx Kintex-7 Field-Programmable Gate Array under Heavy Ion Irradiation David Lee, Michael Wirthlin, Gary Swift, Anthony Le PDF
2014 A Multi-tiered Optimization Framework for Heterogeneous Computing A. Milluzzi, J. Richardson, A. George, H. Lam PDF
2014 On the Characterization of OpenCL Dwarfs on Fixed and Reconfigurable Platforms K. Krommydas, W. Feng, M. Owaida, C. Antonopoulos, N. Bellas PDF
2014 Delivering Parallel Programmability to the Masses via the Intel MIC Ecosystem: A Case Study K. Hou, H. Wang, W. Feng PDF
2014 Optimization and Evaluation of Image- and Signal-Processing Kernels on the TI C6678 Multi-Core DSP B. Ramesh, A. Bhardwaj, J. Richardson, A. George, H. Lam PDF
2014 Fast and Flexible High-Level Synthesis from OpenCL using Reconfiguration Contexts J. Coole, G. Stitt PDF
2014 Soft Error rate estimations of the Kintex-7 FPGA within the ATLAS Liquid Argon (LAr) Calorimeter Michael Wirthlin, Helio Takai, and Alex Harding PDF
2014 Multi-bit Fault Injection for FPGAs with SPFI G. Cieslewski, A. Jacobs, A. George, and A. Gordon-Ross PDF
2014 A Power-Efficient Real-Time Architecture for SURF Feature Extraction C. Wilson, P. Zicari, S. Craciun, P. Gauvin, E. Carlisle, A. George, H. Lam
2014 A Framework to Analyze Processor Architectures for Next-Generation On-Board Space Computing T. M. Lovelly, D. Bryan, K. Cheng, R. Kreynin, A. D. George, A. Gordon-Ross, and G. Mounce PDF
2014 Multibit Fault Injection for FPGAs with SPFI G. Cieslewski, A. Jacobs, A. George, A. Gordon-Ross, PDF
2014 Benchmarking Parallel Performance on Many-Core Processors B. Lam, A. Barboza, R. Agrawal, A. George, H. Lam PDF
2014 Optimization and Evaluation of Image- and Signal-Processing Kernels on Multicore, Embedded SoCs Barath Ramesh, Asheesh Bhardwaj, Justin Richardson, Alan D. George, Herman Lam PDF
2013 Optimization techniques for a high level synthesis implementation of the Sobel filter Josh Monson, Michael Wirthlin, Brad Hutchings PDF
2013 Reconfigurable Computing Architecture for Accurate Disparity Map Calculation in Real-Time Stereo Vision P. Zicari, H. Lam, and A. George PDF