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Publications

Year Title Authors View
2014 Soft Error rate estimations of the Kintex-7 FPGA within the ATLAS Liquid Argon (LAr) Calorimeter Michael Wirthlin, Helio Takai, and Alex Harding PDF
2014 Multi-bit Fault Injection for FPGAs with SPFI G. Cieslewski, A. Jacobs, A. George, and A. Gordon-Ross PDF
2014 A Power-Efficient Real-Time Architecture for SURF Feature Extraction C. Wilson, P. Zicari, S. Craciun, P. Gauvin, E. Carlisle, A. George, H. Lam
2014 A Framework to Analyze Processor Architectures for Next-Generation On-Board Space Computing T. M. Lovelly, D. Bryan, K. Cheng, R. Kreynin, A. D. George, A. Gordon-Ross, and G. Mounce PDF
2014 Multibit Fault Injection for FPGAs with SPFI G. Cieslewski, A. Jacobs, A. George, A. Gordon-Ross, PDF
2014 Benchmarking Parallel Performance on Many-Core Processors B. Lam, A. Barboza, R. Agrawal, A. George, H. Lam PDF
2014 Optimization and Evaluation of Image- and Signal-Processing Kernels on Multicore, Embedded SoCs Barath Ramesh, Asheesh Bhardwaj, Justin Richardson, Alan D. George, Herman Lam PDF
2014 Comparative Analysis of Present and Future Space Processors with Device Metrics T. M. Lovelly, K. Cheng, W. Garcia, and A. D. George PDF
2014 CSP: A Multifaceted Hybrid System for Space Computing P. Gauvin, J Urriste, D. Rudolph, J. Stewart, C. Wilson, C. Morales, A. George, H. Lam, A. Stoddard, A. Wilson, M. Wirthlin, G. Crum PDF
2014 CSP: A Multifaceted Hybrid Architecture for Space Computing D. Rudolph, C. Wilson, J. Stewart, P. Gauvin, A. D. George, H. Lam, G. Crum, M. Wirthlin, A. Wilson, and A. Stoddard PDF
2014 Simulative analysis of a multidimensional torus-based reconfigurable cluster for molecular dynamics A. Lawande, H. Yang, A. George, and H. Lam PDF
2014 CERE: a CachE Recommendation Engine: Efficient Evolutionary Cache Hierarchy Design Space Exploration G. Yessin, A. A. Badawy, V. Narayana, D. Mayhew, and T. El-Ghazawi PDF
2014 Symbiotic Scheduling of Concurrent GPU Kernels for Performance and Energy Optimizations T. Li, V. K. Narayana and T. El-Ghazawi PDF
2014 New approaches for in-system debug of behaviorally-synthesized FPGA circuits Josh Monson and Brad Hutchings PDF
2014 A Method and Case Study on Identifying Physically Adjacent Multiple-Cell Upsets Using 28-nm, Interleaved and SECDED-Protected Arrays M. Wirthlin, D. Lee, G. Swift, and H. Quinn PDF
2014 Single-Event Characterization of the 28 nm Xilinx Kintex-7 Field-Programmable Gate Array under Heavy Ion Irradiation David Lee, Michael Wirthlin, Gary Swift, Anthony Le PDF
2014 A Multi-tiered Optimization Framework for Heterogeneous Computing A. Milluzzi, J. Richardson, A. George, H. Lam PDF
2014 On the Characterization of OpenCL Dwarfs on Fixed and Reconfigurable Platforms K. Krommydas, W. Feng, M. Owaida, C. Antonopoulos, N. Bellas PDF
2014 Delivering Parallel Programmability to the Masses via the Intel MIC Ecosystem: A Case Study K. Hou, H. Wang, W. Feng PDF
2014 Optimization and Evaluation of Image- and Signal-Processing Kernels on the TI C6678 Multi-Core DSP B. Ramesh, A. Bhardwaj, J. Richardson, A. George, H. Lam PDF
2014 Fast and Flexible High-Level Synthesis from OpenCL using Reconfiguration Contexts J. Coole, G. Stitt PDF
2013 FPGA-Based HPC Application Design for Non-Experts D. Uliana, K. Kepa, P. Athanas PDF
2013 Enabling Development of OpenCL Applications on FPGA platforms K. Shagrithaya, K. Kepa, P. Athanas PDF
2013 Characterization and Mitigation of the MGT-Based Aurora Protocol in a Radiation Environment Harding, A. Ellsworth, K., Nelson, B. and Wirthlin, M PDF
2013 Implementing high-performance, low-power FPGA-based optical flow accelerators in C Monson, J, Wirthlin, M, and Hutchings, B. L. PDF
2013 Rapid FPGA design prototyping through preservation of system logic: A case study Haroldsen, T.; Nelson, B.; White, B. PDF
2013 Impact of hard macro size on FPGA clock rate and place/route time Lavin, C.; Nelson, B.; Hutchings, B. PDF
2013 Improving Clock-Rate of Hard-Macro Designs Christopher Lavin and Brent Nelson and Brad Hutchings PDF
2013 A Scalable RC Architecture for Mean-Shift Clustering S. Craciun, G. Wang, A. George, H. Lam, and J. Principe PDF
2013 Pseudo-Constant Logic Optimization A. Landy and G. Stitt PDF
2013 BSW: FPGA-Accelerated BLAST-Wrapped Smith-Waterman Aligner B. Lam, C. Pascoe, S. Schaecher, H. Lam, and A. George PDF
2013 Application-Specific Processors for Web-Browsing: An Exploration and Evaluation of the Design Space G. Yessin, L. Riha, T. El-Ghazawi, and D. Mayhew PDF
2013 PRML: A Modeling Language for Rapid Design Exploration Partially Reconfigurable FPGAs R. Kumar and A. Gordon-Ross PDF
2013 Task Scheduling for Reconfigurable Systems in Dynamic Fault-Rate Environments A. Jacobs, N. Wulf, and A. George PDF
2013 FPGAs operating in a radiation environment: lessons learned from FPGAs in space Michael Wirthlin PDF
2013 CHREC Space Processor (CSP): A Broad Vision for Hybrid Space Computing C. Wilson, J. Urriste, P. Gauvin, J. Stewart, A. George, H. Lam, T. Flatley, G. Crum, M. Wirthlin
2013 Reduced-Precision Redundancy for Reliable FPGA Communications Systems in High-Radiation Environments B. Pratt, M. Fuller, M. Rice, and M. Wirthlin PDF
2013 Optimization techniques for a high level synthesis implementation of the Sobel filter Josh Monson, Michael Wirthlin, Brad Hutchings PDF
2013 Reconfigurable Computing Architecture for Accurate Disparity Map Calculation in Real-Time Stereo Vision P. Zicari, H. Lam, and A. George PDF
2013 Reconfigurable Computing Middleware for Application Portability and Productivity R. Kirchgessner, A. George, and H. Lam PDF
2013 TSHMEM: Shared-Memory Parallel Computing on Tilera Many-Core Processors B. Lam, A. George, and H. Lam PDF
2013 On-chip Context Save and Restore of Hardware Tasks on Partially Reconfigurable FPGAs A. Morales-Villanueva and A. Gordon-Ross PDF
2013 HTR: On-chip Hardware Task Relocation for Partially Reconfigurable FPGAs A. Morales-Villanueva and A. Gordon-Ross PDF
2013 Wideband Channelization for Software-Defined Radio via Mobile Graphics Processors V. Adhinarayanan, W. Feng PDF
2013 Characterizing the Challenges and Evaluating the Efficacy of a CUDA-to-OpenCL Translator M. Gardner, P. Sathre, W. Feng, G. Martinez PDF
2013 Virtual Finite-state-machine Architectures for Fast Compilation and Portability L. Hao, G. Stitt
2012 Bandwidth-Sensitivity-Aware Arbitration for FPGAs L. Hao, G. Stitt PDF
2012 A Design Assembly Framework for FPGA Back-End Acceleration T. Frangieh, P. Athanas PDF
2012 A Comparison Study on Implementing Optical Flow and Digital Communications on FPGAs and GPUs J. Bodily, B. Nelson, Z. Wei, D. Lee, J. Chase PDF
2012 An Introduction to TSHMEM for Shared-Memory Parallel Computing on Tilera Many-Core Processors B. Lam, A. George, and H. Lam PDF